Term Status |
Class Section Class Number |
Class Title | Instructor(s) | Schedule & Location |
Fill | Action(s) |
---|---|---|---|---|---|---|
20S Open 1818/0.000523 | EECT 6325.001 24183 | VLSI Design (3 Semester Credit Hours) | Joseph Friedman | Monday & Wednesday
2:30pm - 3:45pm ECSN 2.126 | Class DetailInstructor CVMore Options... |